About Us Klaar om te solliciteren? Lees de omschrijving alstublieft minstens één keer door voordat u op \Solliciteren\ klikt. Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support
Job Description 5+ years of experience in RTL functional verification for FPGA and/or ASIC designs Advanced knowledge of SystemVerilog and UVM Hands-on experience with verification EDA tools (e.g., Siemens, Cadence, Synopsys) Strong analytical and problem-solving abilities
About Us De volgende informatie is bedoeld om potentiële kandidaten een beter inzicht te geven in de vereisten voor deze functie. Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform
About Us Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us. In just four years,